199408 – Knowlton – 4 Microloks Plus a Triangle: A Microlok Plus Configuration for the Toowoomba Resignalling

The resignalling of the Toowoomba station area was awarded to Kilpatrick Green Pty Ltd working with Ventura Projects, as a variation to the Laidley to Toowoomba Resignalling project.

This layout provided an ideal opportunity for the introduction of the Union Switch and Signal’s Microlok Computer Based Interlocking (CBI) equipment.

The paper’s title, “4 Microloks Plus a Triangle”, is derived from the equipment application decided on for this interlocking.

Toowoomba station area track layout provides a triangular junction and interconnection arrangement for three main lines. The system existing at the time of the award was a mechanical frame installation mainly operating semaphore signals and mechanical points. Hence the move to Microlok represents major leap in signalling technology from mechanical to processor interlocking in one step. Some track rationalisation was incorporated with the re-signalling and most points were equipped with Westinghouse TDM84 point machines.

With the Microlok range of equipment there are a number of choices when it comes to application decisions. The original product, Microlok, is based on a separate l9 inch rack cardfile for the processor and system management functions, with and another separate cardfile for the I/O cards. The telemetry field station equipment “Genisys” is contained in a further separate cardfile. Some time prior to the Toowoomba project Union Switch & Signal had decided to develop a more compact derivative product “Microlok Plus” for smaller type interlockings. Microlok Plus is based on a single card file complete with a set of processorlsystem cards, capacity for any combination of up to 10 I/O cards and a further three slots for a Genisys system incorporating up to 2 non vital I/O cards.

The initial decision was whether to go Microlok or Microlok Plus. The Microlok Plus offered the most cost effective solution, but perhaps a more important decision was that Microlok Plus is more relevant to the type of applications most likely to be encountered in Australia. In the event we decided Microlok Plus was the way to go.

As this installation was to be the first of its type in Australia and bearing in mind the contract time constraints we decided that there would be no “Austalianisation” of the product, that is no special 110v lamp driver cards and no development of 50 volt relay driver cards. Standard US&S equipment was the way to go without running the risks associated with special developments and verification and validation processes for safety critical systems, certainly resulting long deliveries. The Microlok is able to drive standard BR 960 relays operating at 24 volts. Using interface relays on the outputs provided facilities for direct feeding signals and accommodated the interfaces to the WBS ATP system.

The I/O capacity requirements, determined by the signalling equipment to be controlled, dictated we use 4 Microlok Plus cardfiles that would fit onto two 19 racks and include a Genisys interface. Had we decided to use the original Microlok equipment it would have required 3 cardfile sets taking up three 19″ racks and another for a Genisys interface into the telemetry code line.

The signalling area was complex to a degree in that the triangle has routes in all directions in and out, resulting in a significant number of route locking functions. This is made more complex by the number of preceding shunt signals in the main routes. QR chose to have comprehensive approach locking on the premise that a processor based system is not limited in the way relay interlockings are.

The final complication was the integration of all the crossings in the interlocking. A total of 11 crossings are within the station area, a mixture of booms and flashlights. Many of the crossings have overlapping controls.

The significance of the above becomes apparent when considering the serial data flow between the cardfiles. We elected to use one cardfile for each of the branches, of the triangle and a fourth for the triangle area.(See FIGURE 1) The serial ports for vital data to and from each cardfile were connected in a ring arrangement.(See FIGURE 2). With this configuration each branch had some data to and from each of the other cardfiles, passing track, signal aspect, route locking and approach locking data. As a result of the ring configuration some data had to go from one cardfile into it’s adjacent cardfile and then on to the next.

The magnitude of the data flow can be imagined when in some cases there is in excess of 100 bits in each direction between cardfiles. The serial data rate speed can be configured within a range of speeds and the time between messages can be programmed.

When a change of state occurs in the Microlok, either by way of changed input, changed serial data bit or changed non-vital bit, the processing required of this change is stacked on an internal trigger list. The trigger list is a list of the changes to be actioned within the interlocking resulting from the change of state. The processor handles sequentially each operation on the trigger list, and of course as it handles them other actions may be initiated and in turn added to the trigger list. The system management is designed such that the data for the vital serial link is held whilst the internal functions are completed. When this is achieved the systems up-dates the serial data bits.

Each Microlok vital serial link can be assigned as a Master or Slave to another Microlok, in the case of Toowoomba a ring was made between all 4 Microloks by connecting the Master port of one unit to the Slave port on its adjacent unit. The Master port is the port controlling transmission in that it sets the speed and time between up-dates of the messages from the Slave.

During site functional testing problems occurred in one particular cardfile that involved a route around the triangle with two preceding shunts that traversed three of the Microloks. We experienced timing problems in getting data from the next but one Microlok in time to complete the aspect circuit that proved 2 preceding shunts. It appeared that due to the significant processing that was occurring within each cardfile the serial data links were loosing data due to the maximum time for the data exchange being too short.

Data that is passing through one unit has to be processed before it is directed to the outgoing port to the adjacent unit. If that processor has a big trigger list of actions to process the delay on the passage of through data can be problem. The difficulty at Toowoomba was solved by increasing the maximum time for serial data up-date and introducing longer time delayed on some functions that are stick circuits.

The Microlok provides a very comprehensive timing facility on functions within the system, any internal or output function can be assigned a slow to drop and slow to pick feature. The function can, if required have both attributes assigned to it. The processor in a Microlok Plus has the capacity to handle approximately 100 separate functions with timed features applied to them.

The capacity of each Microlok Plus to handle internal interlocking functions is limited to l000 short assign statements (equivalent to relay coils), or fewer longer statements, as a rule of thumb. The major consideration is the amount of processing within each cardfile. The more actions for each change of state results in slower internal processing and slower serial data links, and care must be taken not to exceed the total application EPROM capacity. The basic limiting factor in assessing the application is the 10 110 cards which provide 8 inputs and 6 outputs per card.

One important factor that should be considered by the end users is their stated necessity to perpetuate the interlocking characteristics of relay interlockings when programming a processor interlocking. The processor has only data in a 1 or 0 state and the executive software is designed to fail safe if any bit is not in the correct state according to the application design. The practice being called for by some railways that are using processor systems is to include traditional circuit design with back contact proving. The result of this is to create unnecessary processing requirements that slow up the response time of the interlocking. It must be accepted that if a bit is called to the 0 state that it has done so if the processor doesn’t go into a failure mode. It is not necessary to then put the bit at 0 in lots of other functions to convince yourself that the system is safer because of it. The result of this type of design is to create unnecessary processing. Similarly any function that is assigned as an input or output be it to an I/O card or serial port, can be used directly in the assign statements without having to create an internal function. Timing functions cannot be directly assigned to inputs, these have to have repeated internally.

Given a second opportunity at the application for Toowoomba we may have configured the serial ports differently to try and minimise the data between units.

More recently we were able to install another Microlok Plus installation at Harristown, an interlocking on the fringes of Toowoomba. This system was commissioned only a few weeks ago and it incorporates a recently developed Genisys controller card that is able to talk to the S2 code line.

On your visit to Toowoomba you will see the Microlok system connected up with hard wiring between a Genisys cardfile and a S2 field unit. This arrangement was considered to be temporary and is to be replaced by a Genisys S2 card to be fitted into one of the Microlok Plus non-vital slots and connected via a EDMI Railmaster modem interface to the S2 line.